PCIe Engineering Manager

A company is looking for a PCIe Engineer. Key Responsibilities: Architect, develop, and utilize simulation and formal-based verification environments at IP and SoC-level Lead and manage verification teams, including planning, execution, and delivery to programs Develop and execute comprehensive verification plans, including testbenches and test cases Required Qualifications: 10+ years of experience as a senior Pre-silicon verification engineer with PCIe physical and link layer experience Experience with development of UVM and System Verilog test benches and simulation tools such as Synopsys VCS or Cadence Xcelium Strong understanding of advanced verification techniques, including assertion and metric-driven verification Prior experience in pre-silicon validation within the semiconductor industry Familiarity with hardware description languages (e.g., Verilog) and SOC debug techniques

Mar 22, 2025 - 01:10

A company is looking for a PCIe Engineer. Key Responsibilities: Architect, develop, and utilize simulation and formal-based verification environments at IP and SoC-level Lead and manage verification teams, including planning, execution, and delivery to programs Develop and execute comprehensive verification plans, including testbenches and test cases Required Qualifications: 10+ years of experience as a senior Pre-silicon verification engineer with PCIe physical and link layer experience Experience with development of UVM and System Verilog test benches and simulation tools such as Synopsys VCS or Cadence Xcelium Strong understanding of advanced verification techniques, including assertion and metric-driven verification Prior experience in pre-silicon validation within the semiconductor industry Familiarity with hardware description languages (e.g., Verilog) and SOC debug techniques